Description
The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.
Features
- Twenty ECL/PECL differential outputs.
- One ECL/PECL compatible differential or single-ended clock inputs.
- One HSTL compatible differential or single-ended clock inputs.
- Hot-swappable/-insertable.
- 50 ps output-to-output skew.
- 150 ps device-to-device skew.
- 500 ps propagation delay (typical).
- 1.4 ps RMS period jitter (max. ).
- 1.5 GHz Operation (2.7 GHz max. toggle frequency).
- PECL mode supply range: VCC = 2.5V±.
CY2DP3120 Datasheet
