CY2DP3120 buffer equivalent, differential clock/data fanout buffer.
* Twenty ECL/PECL differential outputs
* One ECL/PECL compatible differential or single-ended clock inputs
* One HSTL compatible differential or single-ended .
The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized to ac.
The CY2DP3120 is a low-skew, low propagation delay 1-to-20 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The device is implemented on SiGe technology and has a fully differe.
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